Product Summary

The XC73108-15WC84C is a member of the XC7300 CMOS EPLD family. It employs a unique Dual-Block architecture, which provides high speed operations via Fast Function Blocks and/or high density capability via High Density Function Blocks. In addition, the XC73108-15WC84C architecture employs the Universal Interconnect Matrix (UIM) which guarantees 100% interconnect of all internal functions. The XC73108-15WC84C is designed in 0.8m CMOS EPROM technology.

Parametrics

XC73108-15WC84C absolute maximum ratings: (1)ripple-carry delay per bit: 1 ns; (2)output driving current: 24 mA; (3)I/O: 3.3 V or 5 V.

Features

XC73108-15WC84C features: (1)High-performance Erasable Programmable Logic Device; (2)Advanced Dual-Block architecture; (3)100% interconnect matrix; (4)High-speed arithmetic carry network; (5)Multiple independent clocks; (6)Each input programmable as direct, latched, or registered; (7)High-drive 24 mA output; (8)I/O operation at 3.3 V or 5 V; (9)Meets JEDEC Standard (8-1A) for 3.3 V ± 0.3 V; (10)Power management options; (11)Multiple security bits for design protection; (12)Supported by industry standard design and verification tool; (13)100% PCI compliant.

Diagrams

XC73108-15WC84C block diagram

XC7300
XC7300

Other


Data Sheet

Negotiable 
XC73144
XC73144

Other


Data Sheet

Negotiable 
XC7336
XC7336

Other


Data Sheet

Negotiable